The JTRS has defined a standard based on the CORBA infrastructure, which was developed by the commercial sector for sharing software application modules over the Internet. While this has the advantage of defining a standardized interface, the power requirements associated with such an interface are likely to be very high, since it implicitly requires a software processor for the radio implementation. As shown in Figure 5-1, this approach will result in energy efficiency that is many orders of magnitude less than would otherwise be attainable. The commercial sector is also developing multiband and multistandard radios, but it uses software to reconfigure the hardware and is not considering approaches similar to the JTRS CORBA approach for its commercial applications.

The fully flexible JTRS radio will need an analog front-end that is tunable over a broad range of frequencies, from low megahertz to high gigahertz. This will require a considerable breakthrough in RF design and is potentially very inefficient with respect to power. The commercial approach is to use a number of duplicate RF chains, each of which is optimized for a single frequency band. It is suggested that careful consideration be given to how the analog portions of the radio are designed, since Moore’s law technology scaling, which benefits the digital computation, will increase the power required for the analog circuitry.

To reduce the required transmit power, the soldier JTRS radio is being designed as part of a mesh network where each radio serves as a repeater to extend transmission coverage. However, care should be used in designing the ad hoc network protocols needed in such a network. Simulation studies have shown that the greedy approach—increasing transmission power only to the point of communication with at least one other node—leads to rapid depletion of the batteries of the nodes in the center of the formation as well as to added latency. Nodes in the center of the formation have to store and forward communications between nodes on the periphery, increasing local power demand and accumulating more latency for all messages. Recognizing and broadcasting over congested areas more evenly distributes power demand among all the nodes. Radio network simulations have been developed that accurately model radio power demand and these could be used to evaluate the energy efficiency of various protocols.

This section discusses new commercial trends and whether the trends highlighted in Energy-Efficient Technologies (NRC, 1997) are still valid and relevant to the Army. It also discusses the validity of projections made in that report and updates the original LW predictive model to reflect more recent goals and requirements.

The National Technology Roadmap for Semiconductors (NTRS) projections are still valid, as Moore’s law is expected to hold true for at least another 8 years. The predictions of the 1994 NTRS tables regarding feature size and voltage reduction have been realized and even slightly exceeded (SIA, 1994). On the other hand, neither chip sizes nor the number of bits per chip on dynamic random access memory (DRAM) have grown at the projected rate, because lithography and manufacturing techniques at and below 0.1 micron are very expensive. Circuit development cost, particularly mask development, is rising with progressively smaller integration scales: from less than $1 million for micron-scale to $3 million for nanometer-scale.

The demand for ever denser circuitry has slowed, while demand for less complex application chips is growing exponentially. For example, a 90-nm complementary metal-oxide semiconductor (CMOS) can provide 8 to 64 MB/cm² (SRAM or DRAM) and 25 M logic gates. However one of the main sources of chip demand, the cell phone, typically requires only 2 M gates. Even most complex applications require on the order of 8-10 M gates. One of the largest commercial drivers is the personal computer (PC), but PC sales have declined since 1997. Industry is looking for new growth applications, but these new applications are likely to require fewer gates than cutting-edge technology. Even though application chips are less complex than state-of-the-art chips, costs and prices have still benefited from the feature size reduction. Decreasing demand for traditional masks in development may well combine with increasing demand for application chips to reduce costs.

Since Energy-Efficient Technologies was written, there has been rapid progress in low-power technology, outstripping the Semiconductor Industry Association (SIA) roadmap, with increased performance and less power per circuit expected from scaling the transistor and wiring dimensions and to some degree the voltage. Since 1997, the energy efficiency of circuits has improved by a factor of at least 5. By one measure, the reduction in demand is greater than the improvement in rechargeable batteries, since time between recharges has only increased 20 percent. With increasing functionality, the net power demand for consumer electronics has remained essentially constant.

However, the exponential growth that has characterized improvements in commercial microprocessor performance may dramatically slow in the next few years. There are numerous barriers to progress after one or two more generations. The most relevant to low-power electronics are the various leakage currents that cause a passive power component, which is becoming increasingly significant compared to the active power.