9
Microelectronics



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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 9 Microelectronics

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 PANEL MEMBERS Lou Ann Heimbrook, Agere Systems, Chair Christopher P.Ausschnitt, IBM Microelectronics Division D.Keith Bowen, Bede Scientific, Inc. James Duley, Hewlett-Packard Laboratories Robert E.Ellefson, Leybold Inficon, Inc. Katharine G.Frase, IBM Microelectronics Division Michael E.Kahn, KLA-Instruments (retired) Robert C.McDonald, Intel Corporation (retired) David N.McQuiddy, TriQuint Semiconductor, Inc. Lori S.Nye, Consultant, Mountain View, California Edith Ong, Applied Materials, Inc. Elsa Reichmanis, Bell Laboratories/Lucent Technologies Gary S.Selwyn, Los Alamos National Laboratory Peter W.Staecker, Consultant, Lexington, Massachusetts Ned Tabat, Seagate Technology, LLC Anne L.Testoni, KLA-Tencor Instruments Larry F.Thompson, Ultratech Stepper, Inc. Iwona Turlik, Motorola Advanced Technology Center Submitted for the panel by its Chair, Lou Ann Heimbrook, this assessment of the fiscal year 2001 NIST activities in microelectronics is based on a formal meeting of the panel on April 19–20, 2001, in Gaithersburg, Md., and on documents provided by NIST.1 1   U.S. Department of Commerce, Technology Administration, National Institute of Standards and Technology, Silicon Microelectronics Programs at the National Institute of Standards and Technology: Programs, Activities and Accomplishments, NISTIR 6731, National Institute of Standards and Technology, Gaithersburg, Md., April 2001.

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 PURPOSE OF THE REVIEW The Panel for Microelectronics was established in response to the increasing need, recognized by both the Board on Assessment of NIST Programs and the leadership of NIST, to manage and assess interdisciplinary programs in a way that transcends the organizational lines of the institute. The efforts of the panel are a first attempt to assess NIST programs in one technology area across NIST organizational lines. The panel membership includes members of the seven laboratory panels, plus several at-large members appointed especially for this review. For the purpose of this review, NIST defined microelectronics projects as those supporting the manufacture or design of integrated circuit semiconductors or test technologies for them. The panel was charged with assessing the quality of microelectronics programs within the NIST laboratories, with a focus on the following tasks: Describing the range of microelectronics programs within the NIST laboratories; Evaluating the technical quality of the microelectronics programs; Evaluating the relevance and effectiveness of the criteria NIST uses to determine which projects and programs are included in the microelectronics portfolio; Evaluating how microelectronics programs and projects are coordinated across NIST to ensure synergy and avoid redundancy; Evaluating the adequacy of NIST human resources, equipment, and facilities for the goals of the microelectronics programs, with particular attention to the challenges of refreshing skill sets and equipment in a rapidly changing field; Evaluating how effectively NIST coordinates the microelectronics programs with customer needs in industry, government, and academia, including how NIST: Gathers and uses information on customer needs; Disseminates outputs and results from the microelectronics programs; and Gathers and uses customer feedback on the effectiveness and relevance of NIST programs in microelectronics; Evaluating how effectively current NIST programs in microelectronics meet industry needs, including the timeliness of NIST products and results in this rapidly changing field; and Evaluating how effectively NIST balances shorter-term customer needs and longer-term needs. DESCRIPTION OF THE NIST MICROELECTRONICS PROGRAM NIST presented the panel with a portfolio of ongoing projects that have the microelectronics industry as a primary or secondary customer. These projects, with budgets totaling $31 million in fiscal year 2001, are administratively housed throughout all seven of the NIST Measurements and Standards Laboratories. The Electronics and Electrical Engineering Laboratory, the Manufacturing Engineering Laboratory, the Chemical Science and Technology Laboratory, the Physics Laboratory, and the Materials Science and Engineering Laboratory carry out most of the projects in this portfolio. About one-third of the NIST microelectronics effort ($12 million) is funded and coordinated through the Office of Microelectronics Programs (OMP). This office was established in 1991 to coordinate and fund metrological research and development across NIST and to provide industry with single-point access to NIST projects in microelectronics. OMP manages the National Semiconductor Metrology Program (NSMP) funding, a budget line item separate from those for each of the seven NIST laboratories. The selection of projects for NSMP funding is managed by OMP, using criteria such as fit to NIST

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 mission; availability of needed skills and physical resources; and urgency, as determined by industry interactions and various roadmapping activities such as the ITRS. Projects funded by OMP are subject to quarterly progress reviews and to corrective action if these reviews determine that project goals and milestones are not being met. Projects in microelectronics that are not funded as part of NSMP are managed as part of the project portfolios of individual NIST laboratories. Projects in microelectronics have recently been organized around common interest groups. The resulting eight program areas are Lithography Metrology, Critical Dimension and Overlay Metrology, Thin Film and Shallow Junction Metrology, Interconnect and Packaging Metrology, Wafer Characterization and Process Metrology, Modeling and Design Metrology, Test Metrology, and Manufacturing Support. Table 9.1 lists the eight program areas and the projects in each. Table 9.2 details fiscal year 2001 funding for microelectronics, broken down according to program area and participating laboratories. ASSESSMENT OF THE NIST MICROELECTRONICS PROGRAM The assessment of NIST efforts in microelectronics was a scientific pleasure but a management challenge for the panel. The organization of the microelectronics program is clearly evolving, as demonstrated by the recent (December 2000) grouping of projects into program areas. Prioritization methodology and strategic planning for the overall program are also still evolving. The breadth and number of projects also make a detailed assessment difficult. For this reason, the panel decided it could not adequately address certain points of its charge and determined instead to focus its efforts on those areas where it had sufficient information to comment meaningfully. Specifically, the panel chose not to discuss in detail the technical merit of the projects or the adequacy of resources. The technical merit of the projects under way in each of the NIST laboratories has been discussed by the laboratory review panels in Chapters 1 through 8 of this volume. The conclusion drawn by those panels—that the overall technical merit of ongoing work in the NIST Measurements and Standards Laboratories is high—is consonant with the panel members’ collective knowledge of the work of the laboratories and was not contradicted by anything the panel saw or heard in the course of this review. The panel was presented with total budget numbers for the microelectronics program (see Table 9.2) but no information on human resources, equipment, or facilities. Thus the panel could not judge the adequacy of these resources to achieve the goals of the program. The panel focused its assessment on the technical applicability of current projects and the relevance and effectiveness of the overall program. Technical Applicability of Current Projects Most of the projects with which the panel is familiar showed good technical approaches to real problems being faced by the industry. Examples of highly applicable technical projects include the following: Development of gas flow metrology for handling highly toxic or corrosive gases used in semiconductor fabrication; Characterization of refractive indices and other materials properties necessary to enable 157-nm lithography; Metrology for critical dimension and overlay; Databases for modeling lead-free solder interconnect systems;

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 TABLE 9.1 Program Areas and Ongoing Projects of the NIST Microelectronics Program Program Area Project Participating Laboratory Lithography Metrology Metrology supporting deep ultraviolet lithography PL, EEEL Metrology supporting extreme ultraviolet lithography MEL, PL Lithographic polymers MSEL Critical Dimension and Overlay Metrology Atom-based dimensional metrology MEL Scanning electron microscope-based dimensional metrology MEL Optical-based dimensional metrology MEL Scanning probe microscope-based dimensional metrology MEL Electrical-based dimensional metrology EEEL Model-based dimensional metrology MEL Thin Film and Shallow Junction Metrology Two- and three-dimensional profiling MEL, CSTL Advanced gate dielectric metrology MEL, MSEL, CSTL Ultrashallow depth profiling by ToF-SIMS CSTL Nuclear measurement methods for chemical characterization of As and P implant standards CSTL Boron and nitrogen thin film and implant standards using neutron depth profiling CSTL Effects of elastic-electron scattering on measurements of silicon dioxide film thickness by x-ray photoelectron spectroscopy CSTL Monte Carlo methods for optimizing the quantitative analysis of thin layers, microparticles, and irregular surfaces CSTL Phase identification from sub-200 nm particles by electron backscatter diffraction CSTL Thin film metrology using x-rays PL Optical metrology of the Si/dielectric interface PL Interconnect and Packaging Metrology Measurements and modeling for electrodeposited interconnects MSEL, CSTL Interconnect materials and reliability metrology MSEL, MEL Porous thin film metrology for low-k dielectrics MSEL Interconnect dielectric characterization using transmission-line measurement EEEL X-ray tomography of micro structures PL Solders and solderability measurements for microelectronics MSEL Wire bonding to Cu/low-k semiconductor devices EEEL, MSEL Tin whisker mechanisms MSEL

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 Program Area Project Participating Laboratory   Wafer level underfill—experiment and modeling MSEL Solder interconnect design MSEL X-ray studies of electronic materials MSEL Packaging reliability MSEL Permittivity of polymer films in the microwave range MSEL Texture measurements in thin film electronic materials MSEL Ferroelectric domain stability measurements MSEL Wafer Characterization and Process Metrology Wafer and chuck flatness metrology MEL Modeling and measurements of particles PL, BFRL High-resolution microcalorimeter x-ray spectrometer for chemical analysis EEEL Thermophysical properties of gases used in semiconductor processing CSTL Models and data for chemical vapor deposition CSTL Temperature measurements and standards for rapid thermal processing MEL, CSTL, PL Standards for low concentrations of water vapor in gases CSTL Plasma process metrology EEEL, CSTL, PL Development of quantitative measurements for vacuum process control CSTL Modeling and Design Metrology Metrology for simulation and computer-aided design EEEL Nonlinear device metrology and modeling EEEL Test Metrology At- speed test of digital integrated circuits EEEL Measurements for complex electronic systems EEEL Manufacturing Support NIST/SEMATECH engineering statistics Internet handbook ITL Development of measurement tools needed to develop lead-free solders for use in harsh environments; Development of an SRM artifact to standardize two-dimensional measurements in the semiconductor industry regardless of instrument used; Development of reference artifacts to enable high-accuracy dimensional measurements using scanning electron microscopy; Development of measurement tools and models to characterize and enable electrodeposited copper interconnects with appropriate (superconformal) feature fill; and

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 TABLE 9.2 Fiscal Year 2001 Funding for the NIST Microelectronics Program (millions of dollars) Funding Amount By Program Area Wafer Characterization and Process Metrology 8.2 Modeling and Design Metrology 1.0 Lithography Metrology 2.6 Thin Film and Shallow Junction Metrology 8.1 Test Metrology 0.1 Critical Dimension and Overlay Metrology 4.4 Manufacturing Support 0.1 Interconnect and Packaging Metrology 6.6 By Laboratory EEEL 11.7 MEL 4.2 CSTL 4.5 PL 4.0 MSEL 5.9 BFRL 0.2 ITL 0.1 Totala,b 31.0 aThe totals do not add exactly to $31 million due to rounding. bOf the $31 million total funding, $12 million is disbursed and managed by the Office of Microelectronics Programs. Development and dissemination of a master database of information on candidate materials for use as low-k dielectric materials in future semiconductor devices. Highly applicable projects appear to have been developed primarily in a bottom-up way—that is, they have been driven by the knowledge and enthusiasm of an individual researcher who has the technical contacts in industry to become aware of a need. This individual-investigator-driven approach to project development has some advantages—it assures, for example, a strong match between projects and the available skill set and equipment, and it leads to great staff enthusiasm for projects and to good morale. While recognizing that the bottom-up viewpoint is valuable and must never be lost, the panel notes that lack of an integrated view or a higher-level strategic plan is limiting the effectiveness of some projects. For example, the microelectronics program includes separate projects on the use of x-ray techniques and ellipsometry for thin film metrology, but it is not poised to produce an integrated set of recommendations on thin film measurement techniques. The panel suggests that in addition to having an integrated strategic plan, a mechanism such as an advisory board might be used to regularly obtain an external view of program priorities and coordination. Internal birds-of-a-feather groups convening researchers with similar technical interests who happen to work in different laboratories are another means to achieve cross-fertilization of ideas and improve program coordination. The panel understands that just such a group is being formed in the area of thin film metrology.

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 SRMs are a particularly applicable NIST product and represent a unique NIST capability for the industry. However, SRM development and production is generally a lengthy process, and some panel members who are users of these materials have been disappointed with the lack of timeliness of SRM solutions provided by NIST. If SRMs are released late in the development of a new process, they are of minimal use to the industry. The panel recommends that in the microelectronics program, NIST focus SRM development on areas where accuracy is truly vital to enable tooling or supplier commonality (for example, in the area of photomasks) and carefully assess prior to undertaking its development whether an SRM can be delivered soon enough. Alternatively, NIST could release interim standards which, while not having the precision and accuracy ultimately desired for the measurement, could give industry a measuring rod for comparison across various instruments and companies while the final standard is being developed. So that the applicability of the microelectronics program can be better assessed, the panel suggests that all microelectronics projects be presented in a format that includes project goals, performance metrics, and project time line. Ties to roadmaps such as ITRS must be stated more explicitly, and the roadblocks the project will remove need to be discussed, paying particular attention to roadmap timelines. Project leaders need to be able to quantify the results of their work; they might, for example, document an improvement in the accuracy and precision of measurement capabilities as a function of time. Program Relevance and Effectiveness Coordination of the Program with Customer Needs Obtaining and Using Information on Customer Needs. OMP and the laboratories use a variety of methods to gather information from industry on its technical needs in measurements and standards. These methods include participating in consortia and in industry roadmapping activities, collaborating with industrial partners via CRADAs, and hosting guest researchers from industry. Where in-depth discussions on a topic are necessary, NIST has organized workshops. Recent workshops include “Mass Flow Measurement and Control for the Semiconductor Industry” and “Issues Related to Scanning Surface Inspection Systems Calibration with Polystyrene Spheres.” Where no established forum for dialogue exists—for example, rapid thermal processing, plasma processing, particle characterization, and wafer metrology—NIST has convened common interest groups. Staff members also maintain strong individual ties with their counterparts in industry, universities, and government laboratories worldwide. These mechanisms provide NIST researchers with good insight into current and future industrial needs in measurements and standards, and the panel can see that this information influences project direction. However, once gathered, there is no process or mechanism for capturing and managing the information gathered by so many individuals and groups. Information gathered by one person may not be shared across the program with others who might benefit from the insights. The microelectronics program needs a mechanism for managing this information and for regular internal reviews of this information with program managers and researchers. The information must then be used in a structured prioritization process for the overall microelectronics program that considers customer inputs, industry trends, and NIST capabilities. Better management and sharing of this information will aid in making programmatic decisions and can lead to unanticipated opportunities and research directions. Dissemination of Program Results. Results must be effectively communicated to customers in order to be used. NIST is using a variety of techniques—publications, Web sites, conferences, consortia, and

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 involvement in industry associations—to successfully disseminate its program results. The laboratory review panels note the large number of technical papers in high-quality publications that result from NIST research. Workshops sponsored by NIST serve the dual purpose of disseminating NIST results and providing input to NIST projects. Overall, NIST has a strong program for disseminating technical information to research peers in both industry and academe. However, while dissemination is very effective at the level of individual investigators and their projects, the need exists for more dissemination of information on the overall program. OMP should take a more active role in presenting overall program results and strategies at meetings, conferences, and the like. This would make industry more aware of the overall program portfolio and provide another opportunity to gather customer input and feedback. Use of Feedback on Program Results. Individual NIST researchers generally have close ties to the customers for their work and take good advantage of technical feedback on their projects. It is not clear to the panel how well feedback is gathered and utilized at a higher program level. Customer feedback on projects and the overall program should be included in the information gathering, management, and review process suggested above. Effectiveness of the Current Program Portfolio The panel received technical presentations in five of the eight program areas: Lithography Metrology, Critical Dimension and Overlay Metrology, Thin Film and Shallow Junction Metrology, Interconnect and Packaging Metrology, and Wafer Characterization and Process Metrology. The projects discussed cover technical issues critical to current semiconductor industry needs. Overall, the program covers at some level most of the key areas of technical interest to the microelectronics industry. Three projects presented were notable for their coupling of exceptional technical expertise with timely delivery of important measurement techniques and standards: measurement and modeling related to copper electrodeposition, porous thin film metrology for low-k dielectrics, and scanning electron microscopy-based dimensional metrology. It was not clear to the panel that timeliness of results relative to industry needs or roadmap time lines were considered at the inception of all projects. Consequently, the panel cannot determine whether there is a good balance between addressing long-term and short-term customer needs. Individual projects are clearly chosen to meet identified industry needs as permitted by available expertise. As noted above, this bottom-up approach is valuable and must never be completely overshadowed by top-down management. However, the program needs a cohesive overall plan. Individual projects coupled by a strategic plan encompassing all of NIST’s microelectronics efforts could have a synergistic impact on NIST’s deliverables to the industry. The panel understands that OMP and each of the individual laboratories have or are developing strategic plans. This effort needs to be taken one step higher, to tie each of these individual laboratory plans to an overall NIST-wide strategy in microelectronics. Coordination of the Microelectronics Program Across NIST Organizational Lines Since semiconductor expertise needs exist in all seven of the laboratories, coordination of the microelectronics program across organizational boundaries is necessary for maximum program impact. Coordination will ensure that The highest-priority projects are worked on,

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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001 The best available skill set is applied to those projects, The considerable investment in relevant capital equipment is fully utilized, and Results of projects are fully disseminated to the appropriate communities. Coordination can also increase the visibility and credibility of programs with industrial customers and other stakeholders. Coordination is occurring in many cases at the grassroots level between individual investigators or groups. For example, good coordination exists in the work on copper electrodeposited interconnects, with MSEL leading in development of process models and MSEL and CSTL working together on developing methods for monitoring processes occurring in the electroplating bath. Good coordination was also observed in advanced gate dielectric research, where EEEL is developing reliability measurement models and ellipsometry techniques, and CSTL is examining structure and composition using its expertise in transmission electron microscopy, grazing incidence x-ray photoelectron spectroscopy, electron probe microanalysis, and secondary-ion mass spectroscopy. However, the panel also notes areas where there could be better coordination and impact. For example, MSEL is working on issues in polymer permittivity but without the involvement of permittivity experts working in EEEL. MSEL is also the lead in efforts on packaging, but in general its efforts should be more coordinated with those of EEEL because of the movement toward very-high-speed circuits. Mechanisms to encourage cross-laboratory coordination at the individual investigator level, such as awards for the best cross-laboratory technical program or for the best collaboration across laboratories, might be considered. The panel observed no clear process for NIST-wide coordination of microelectronics projects. Despite having asked about this directly, the panel had no sign that OMP management and the managers of the various laboratories regularly meet as a group. A more formal structure for managing the microelectronics program, including regular meetings that bring together the heads of all the relevant laboratories and OMP management for discussions of overall strategy and planning, is required if better program coordination is to be achieved. MAJOR OBSERVATIONS Although highly applicable technical projects are being developed and carried out at the individual investigator level, the interdisciplinary technical needs of most microelectronics projects transcend NIST’s current organizational lines. An overall strategic plan is necessary for NIST to maximize the effectiveness of its program in microelectronics. This plan must tie the plans of OMP and those of each laboratory playing a major role in the program into one cohesive overall plan in microelectronics. Good mechanisms exist for obtaining industry input and feedback on projects. This information must be better managed and shared, however, and applied in a structured process to overall program and project selection and prioritization. The results of individual projects are generally well disseminated to technical peers in industry. However, a more active attempt to disseminate overall program results, a natural function for OMP, is needed to improve industrial awareness of the NIST portfolio in microelectronics. Good grassroots coordination between researchers is occurring in many projects. However, a more formal overall management structure for the microelectronics program is needed if the full advantages of program coordination are to be realized. Management of the microelectronics program requires regular meetings that include OMP management and leaders of all the laboratories that play a major role in the program to determine overall program priorities in the context of a NIST-wide strategic plan in microelectronics.