. "9. Microelectronics." An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001. Washington, DC: The National Academies Press, 2001.
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An Assessment of the National Institute of Standards and Technology Measurement and Standards Laboratories: Fiscal Year 2001
The best available skill set is applied to those projects,
The considerable investment in relevant capital equipment is fully utilized, and
Results of projects are fully disseminated to the appropriate communities.
Coordination can also increase the visibility and credibility of programs with industrial customers and other stakeholders.
Coordination is occurring in many cases at the grassroots level between individual investigators or groups. For example, good coordination exists in the work on copper electrodeposited interconnects, with MSEL leading in development of process models and MSEL and CSTL working together on developing methods for monitoring processes occurring in the electroplating bath. Good coordination was also observed in advanced gate dielectric research, where EEEL is developing reliability measurement models and ellipsometry techniques, and CSTL is examining structure and composition using its expertise in transmission electron microscopy, grazing incidence x-ray photoelectron spectroscopy, electron probe microanalysis, and secondary-ion mass spectroscopy. However, the panel also notes areas where there could be better coordination and impact. For example, MSEL is working on issues in polymer permittivity but without the involvement of permittivity experts working in EEEL. MSEL is also the lead in efforts on packaging, but in general its efforts should be more coordinated with those of EEEL because of the movement toward very-high-speed circuits. Mechanisms to encourage cross-laboratory coordination at the individual investigator level, such as awards for the best cross-laboratory technical program or for the best collaboration across laboratories, might be considered.
The panel observed no clear process for NIST-wide coordination of microelectronics projects. Despite having asked about this directly, the panel had no sign that OMP management and the managers of the various laboratories regularly meet as a group. A more formal structure for managing the microelectronics program, including regular meetings that bring together the heads of all the relevant laboratories and OMP management for discussions of overall strategy and planning, is required if better program coordination is to be achieved.
Although highly applicable technical projects are being developed and carried out at the individual investigator level, the interdisciplinary technical needs of most microelectronics projects transcend NIST’s current organizational lines. An overall strategic plan is necessary for NIST to maximize the effectiveness of its program in microelectronics. This plan must tie the plans of OMP and those of each laboratory playing a major role in the program into one cohesive overall plan in microelectronics.
Good mechanisms exist for obtaining industry input and feedback on projects. This information must be better managed and shared, however, and applied in a structured process to overall program and project selection and prioritization.
The results of individual projects are generally well disseminated to technical peers in industry. However, a more active attempt to disseminate overall program results, a natural function for OMP, is needed to improve industrial awareness of the NIST portfolio in microelectronics.
Good grassroots coordination between researchers is occurring in many projects. However, a more formal overall management structure for the microelectronics program is needed if the full advantages of program coordination are to be realized.
Management of the microelectronics program requires regular meetings that include OMP management and leaders of all the laboratories that play a major role in the program to determine overall program priorities in the context of a NIST-wide strategic plan in microelectronics.