FIGURE 2-2 Rapid growth in computing capability spanning eras of vector, massively parallel, and future multicore trends. SOURCE: Vector era and massively parallel era data from Top 500 (http://www.top500.org/); multicore era data notional based on aggressive growth.

FIGURE 2-2 Rapid growth in computing capability spanning eras of vector, massively parallel, and future multicore trends. SOURCE: Vector era and massively parallel era data from Top 500 (http://www.top500.org/); multicore era data notional based on aggressive growth.

Multicore Processing

As component sizes continue to shrink while the processing speed of a CPU remains almost constant, vendors are adding additional processing units to a single chip, creating a new form of parallelism. Each of the processing units is termed a core; one example of a multicore chip is shown in Figure 2-3. Additional performance for a “processor” is being obtained by adding more cores, as shown in Figure 2-2. However, as demonstrated in Figure 2-4, clock frequency appears to be asymptotic, though the actual upper bound is still unknown. Multicore processors are currently achieving speeds higher than 3 Ghz.

Perhaps the most dramatic example of multicore chip technology was Intel’s demonstration of a teraflop (1012 FLOPS) on a chip in 2007 (Figure 2-3). This remarkable achievement is clearly demonstrated when compared to the first teraflop computer, the NNSA’s Advanced Simulation and Computing (ASC)3 program Red Storm platform. The Intel processor is about the size of a dime and consumes 62 watts of power. A decade earlier, a peak teraflop of computing power required 2,500 square feet and consumed half a megawatt of power.

However, there is still much progress to be made to get the work performed on the Red Storm platform translated to the Intel chip or its counterparts, principally due to the limitation of the memory subsystem delivering data to the processor. While processors have doubled in performance approximately every 18 to 24 months in accordance with Moore’s law, memory speeds have increased at most

3

ASC is the abbreviation for the collaborative Advanced Simulation and Computing Program across Department of Energy (DOE) national laboratories to ensure the safety and reliability of the nation’s nuclear weapons stockpile. Available at http://www.lanl.gov/asc/about_us.shtml. Last accessed June 15, 2009.



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