Role in Securing the Information Society, and was a founding member of the Research Council’s Computer Science and Telecommunications Board. He is a fellow of the Institute of Electrical and Electronics Engineers and the American Association for the Advancement of Science and a member of the National Academy of Engineering.

Luiz André Barroso is a Distinguished Engineer at Google Inc., where his work has spanned a number of fields, including software-infrastructure design, fault detection and recovery, power provisioning, networking software, performance optimizations, and the design of Google’s computing platform. Before joining Google, he was a member of the research staff at Compaq and Digital Equipment Corporation, where his group did some of the pioneering work on processor and memory-system design for commercial workloads (such as database and Web servers). The group also designed Piranha, a scalable shared-memory architecture based on single-chip multiprocessing; this work on Piranha has had an important impact in the microprocessor industry, helping to inspire many of the multicore central processing units that are now in the mainstream. Before joining Digital, he was one of the designers of the USC RPM, an FPGA-based multiprocessor emulator for rapid hardware prototyping. He has also worked at IBM Brazil’s Rio Scientific Center and lectured at PUC-Rio (Brazil) and Stanford University. He holds a PhD in computer engineering from the University of Southern California and a BS and an MS in electrical engineering from the Pontifícia Universidade Católica, Rio de Janeiro.

Robert P. Colwell, NAE, was Intel’s chief IA32 (Pentium) microprocessor architect from 1992 to 2000 and managed the IA32 Architecture group at Intel’s Hillsboro, Oregon, facility through the P6 and Pentium 4 projects. He was named the Eckert-Mauchly Award winner for 2005. He was elected to the National Academy of Engineering in 2006 “for contributions to turning novel computer architecture concepts into viable, cutting-edge commercial processors.” He was named an Intel fellow in 1996, and a fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2006. Previously, Dr. Colwell was a central processing unit architect at VLIW minisupercomputer pioneer Multiflow Computer, a hardware-design engineer at workstation vendor Perq Systems, and a member of technical staff at Bell Labs. He has published many technical papers and journal articles, is inventor or coinventor on 40 patents, and has participated in numerous panel sessions and invited talks. He is the Perspectives editor for IEEE’s Computer magazine, wrote the At Random column in 2002-2005, and is author of The Pentium Chronicles, a behind-the-scenes look at modern microprocessor design. He is currently an independent consultant. Dr.

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