Computing and information and communications technology (ICT) has dramatically changed how we work and live, has had profound effects on nearly every sector of society, has transformed whole industries, and is a key component of U.S. global leadership. A fundamental driver of advances in computing and ICT has been the fact that the single-processor performance has, until recently, been steadily and dramatically increasing year over year, based on a combination of architectural techniques, semiconductor advances, and software improvements. Users, developers, and innovators were able to depend on those increases, translating that performance into numerous technological innovations and creating successive generations of ever more rich and diverse products, software services, and applications that had profound effects across all sectors of society.1 However, we can no longer depend on those extraordinary advances in single-processor performance continuing.
This slowdown in the growth of single-processor computing performance has its roots in fundamental physics and engineering constraints—multiple technological barriers have converged to pose deep research challenges, and the consequences of this shift are deep and profound for computing and for the sectors of the economy that depend on and assume, implicitly or explicitly, ever-increasing performance. From a technology standpoint, these challenges have led to heterogeneous multicore chips and a shift to alternate innovation axes that include, but are not limited to, improving chip performance, mobile devices, and cloud services. As these technical shifts reshape the computing industry, with global consequences, the United States must be prepared to exploit new opportunities and to deal with technical challenges. The following sections outline the technical challenges, describe the global research landscape, and explore implications for competition and national security.
Sequential Past, Parallel Future
For multiple decades, single-processor performance has increased exponentially, driven by higher clock rates, reductions in transistor size, faster switching via fabrication improvements, and architectural and software innovations that increased performance while preserving software compatibility with previous-generation processors. This practical manifestation of Moore’s Law—the doubling of the number of transistors on a given amount of chip area every 18 to 24 months—created a virtuous cycle of ever-improving single-processor performance and enhanced software functionality.
Hardware and software capabilities and sophistication grew exponentially in part because hardware designers and software developers could innovate in isolation from each other, while still leveraging each other’s advances. Software developers created new and more feature-filled applications, confident that new hardware would deliver the requisite performance to execute those applications. In turn, chip designers delivered ever-higher performance chips, while maintaining compatibility with previous generations.
Users benefitted from this hardware-software interdependence in two ways. Not only would old
1National Research Council, The Future of Computing: Game Over or Next Level?, Washington, D.C.: The National Academies Press (available online at http://www.nap.edu/catalog.php?record_id=12980) and NRC, 2003, Innovation in Information Technology, Washington, D.C.: The National Academies Press (available online at http://books.nap.edu/catalog.php?record_id=10795).
Below are the first 10 and last 10 pages of uncorrected machine-read text (when available) of this chapter, followed by the top 30 algorithmically extracted key phrases from the chapter as a whole.
Intended to provide our own search engines and external engines with highly rich, chapter-representative searchable text on the opening pages of each chapter. Because it is UNCORRECTED material, please consider the following text as a useful but insufficient proxy for the authoritative book pages.
Do not use for reproduction, copying, pasting, or reading; exclusively for search engines.
OCR for page 1
Summary C omputing and information and communications improving chip performance, mobile devices, and cloud technology (ICT) has dramatically changed how services. As these technical shifts reshape the computing we work and live, has had profound effects on industry, with global consequences, the United States nearly every sector of society, has transformed whole must be prepared to exploit new opportunities and to industries, and is a key component of U.S. global deal with technical challenges. The following sections leadership. A fundamental driver of advances in outline the technical challenges, describe the global computing and ICT has been the fact that the single- research landscape, and explore implications for processor performance has, until recently, been steadily competition and national security. and dramatically increasing year over year, based on a combination of architectural techniques, semiconductor Sequential Past, Parallel Future advances, and software improvements. Users, developers, and innovators were able to depend on those For multiple decades, single-processor performance increases, translating that performance into numerous has increased exponentially, driven by higher clock rates, technological innovations and creating successive reductions in transistor size, faster switching via generations of ever more rich and diverse products, fabrication improvements, and architectural and software software services, and applications that had profound innovations that increased performance while preserving effects across all sectors of society.1 However, we can no software compatibility with previous-generation longer depend on those extraordinary advances in single- processors. This practical manifestation of Moore's processor performance continuing. Law--the doubling of the number of transistors on a This slowdown in the growth of single-processor given amount of chip area every 18 to 24 months-- computing performance has its roots in fundamental created a virtuous cycle of ever-improving single- physics and engineering constraints--multiple processor performance and enhanced software technological barriers have converged to pose deep functionality. research challenges, and the consequences of this shift Hardware and software capabilities and are deep and profound for computing and for the sectors sophistication grew exponentially in part because of the economy that depend on and assume, implicitly or hardware designers and software developers could explicitly, ever-increasing performance. From a innovate in isolation from each other, while still technology standpoint, these challenges have led to leveraging each other's advances. Software developers heterogeneous multicore chips and a shift to alternate created new and more feature-filled applications, innovation axes that include, but are not limited to, confident that new hardware would deliver the requisite performance to execute those applications. In turn, chip 1 National Research Council, The Future of Computing: Game designers delivered ever-higher performance chips, Over or Next Level?, Washington, D.C.: The National Academies while maintaining compatibility with previous Press (available online at http://www.nap.edu/catalog.php?record_ generations. id=12980) and NRC, 2003, Innovation in Information Technology, Users benefitted from this hardware-software Washington, D.C.: The National Academies Press (available interdependence in two ways. Not only would old online at http://books.nap.edu/catalog.php?record_id=10795). 1
OCR for page 1
2 THE GLOBAL ECOSYSTEM IN ADVANCED COMPUTING software execute faster on new hardware, without accelerators and reconfigurable logic for increased change, but also new applications exploited advances in performance while simultaneously meeting power graphics and rendering, digital signal processing and constraints. audio, networking and communications, cryptography Whether homogeneous or heterogeneous, these and security--all made possible by hardware advances. chips are dependent on parallel software for operation, Unfortunately, single-processor performance is now for there is no known alternative to parallel increasing at much lower rates--a situation that is not programming for sustaining growth in computing expected to change in the foreseeable future. performance. However, unlike in the sequential case, The causes for the declining rates of chip hardware there is no universally accepted, compelling performance improvements begin with the limit on chip programming paradigm for parallel computing. Absent power consumption, which is proportional to the product such programming models and tools, creating of the chip clock frequency and the square of the chip increasingly sophisticated applications that fully and operating voltage. As chip clock frequencies rose from effectively exploit parallel chips is difficult at best. Thus, megahertz to gigahertz, chip vendors improved there exists a great opportunity and need for renewed fabrication processes and reduced chip operating research on parallel algorithms and programming voltages and, thus, power consumption. methodologies, recognizing that this is a challenge and However, it is no longer practical to increase long-studied problem. However, because multicore chips performance via higher clock rates, due to power and are dependent on parallel programming, it is prudent to heat dissipation constraints. These constraints are continue such explorations. themselves manifestations of more fundamental Although further research in parallel programming challenges in materials science and semiconductor models and tools may ameliorate this problem (e.g., via physics at increasingly small feature sizes. While the domain-specific languages, high-level libraries, and market for the highest performance server processor toolkits), 40 years of research in parallel computing chips continues to grow, the market demand for phones, suggests this outcome is by no means certain. When tablets, and netbooks has also increased emphasis on combined with the need for increasingly rapid low-power, energy-efficient processors that maximize development cycles to respond to changing demands and battery lifetime. the rising importance of software security and resilience Finally, the use of additional transistors to preserve in an Internet-connected world, the programming the sequential instruction execution model while challenges are daunting. In combination, the continued accelerating instruction execution reached the point of slowing of processor performance and the uncertainty of diminishing returns. Indeed, most of the architectural a parallel software future poses potential short- and long- ideas that were once found only in exotic term risks for U.S. national security and the U.S. supercomputers (e.g., deep pipelines, multiple instruction economy. This report focuses on the competitive issue, out-of-order instruction logic, branch prediction, position of the U.S. semiconductor and software data and instruction prefetching) are commonplace industries and their impact on U.S. national security in within microprocessors. the new norm of parallel computing. The combination of these challenges--power limitations, diminishing architecture returns, and Global Competition and the Research Landscape semiconductor physics challenges--drove a shift to multicore processors (i.e., placing multiple processors, Because of this disruption to the computing sometimes of differing power or performance and ecosystem,2 major innovations in semiconductor function, on a single chip). By making parallelism processes, computer architecture, and parallel visible to the software, this technological shift disrupted programming tools and techniques are all needed if we the cycle of sequential performance improvements and are to continue to deliver ever-greater application software evolution atop a standard hardware base. performance. Beginning with homogeneous multicore chips (i.e., multiple copies of the same processor core), design 2 The advanced computing ecosystem refers not only to the alternatives are evolving rapidly, driven by the twin benefits from and interdependencies between breakthroughs in constraints of energy efficiency and high performance. academic and industry science and engineering research and In addition, system-on-a-chip designs are combining commercialization success by national, multi-national and global heterogeneous hardware functions used in smartphones, companies, but also the underlying infrastructure (that includes components such as workforce; innovation models, e.g., centralist tablets, and other devices. The result is a dizzying variety versus entrepreneurial; global knowledge networks; government of parallel functionality on each chip. It is likely that leadership and investment; the interconnectedness of economies; even more heterogeneity will arise from expanded use of and global markets) that underpin technological success.
OCR for page 1
SUMMARY 3 In the past, the U.S. Department of Defense's competitors certainly are. The principal future national (DOD) uptake of U.S. computing technology research security concerns for the United States related to designed especially for it and now increasingly adapted anticipated computing shifts and limits on single- from the fast-moving consumer market has resulted in a processor performance come not just from the threat to large U.S. advantage. In the future, the rate of change in U.S. technological superiority, but also from changes to the competitive position of the United States in the nature and structure of the marketplace for computing technology will increasingly depend in part computing and information technology. U.S. challenges on other countries' basic research capabilities and the include maintaining the integrity of the global supply types of research and development (R&D) policies they chain for semiconductors, which is exacerbated by the pursue, as well as the associated economic climate. Of convergence of civilian and defense technologies, as course, many factors influence the range and type of well as the rise of a new ecosystem of smart devices, policy options available in each region. Countries also based on licensable components and created by differ in their levels of development and in their semiconductor design firms without fabrication economic institutions, and pursue quite different capabilities. approaches to innovation policy. Over time, the increasing presence and Historically, the United States has relied on market establishment of foreign markets that are larger, are forces and the private sector to convert university potentially more lucrative, and have better long-term research ideas, funded by the federal government, into growth potential than in the United States and other marketable products. In contrast, the European Union developed countries could also have significant and emerging economies such as China, Korea, and implications. Any shift in the global commercial center Taiwan rely much more on the government to define the of gravity could lead to a shift in the global R&D center strategic objectives and key parameters. For example, of gravity as international firms are required to locate in recent Chinese innovation policies have played an these markets if they are to remain competitive and to increasing role in strengthening its indigenous meet the requirements of government regulations in the innovation capabilities. There is also evidence that China target markets. is transitioning toward economic outcome-driven science Shifting from policy to technology, the parallel and technology programs focused on technologies of programming challenges in delivering high performance national strategic importance--many of which are on multicore chips are real and global, with no obvious advanced computing technologies. In contrast, Taiwan's technical solutions. Barring research breakthroughs, innovation policies are focused on moving its IT developing applications that exploit on-chip parallelism industries beyond the traditional "global factory" model. effectively (or vice versa, by developing approaches to Thus, innovation polices emphasize low-cost and fast on-chip parallelism that better support application needs) innovation by strengthening public and private will remain an intellectually challenging task that is partnerships that leverage domestic and global dependent on highly skilled software developers. When innovation networks. combined with the need for rapid application development, nimble response to shifting threats, and the Competitive Implications and National Security ever-present desire for new features, equating competitive advantage in computing solely with single- In the committee's view, the United States currently processor performance (and associated application enjoys a technological advantage in many computing performance) may not be wise. Going forward, metrics technologies. Nonetheless, this technological gap is such as system reliability, energy efficiency, security narrowing as other countries, such as China, make a adaptability, and cost will inevitably become more concerted effort to develop their own indigenous salient. Power consumption is the major constraint on computing design and manufacturing capabilities and as chip performance and device utility. Innovation in design and fabrication of such technologies, as well as software, architecture, hardware, and other computing software development, are increasingly distributed technologies will continue apace, but the primary axes of globally. innovation are shifting, and organizations such as the Thus, it is important to take a long-term perspective U.S. DOD will need to adapt their computing and IT on our approaches to computing innovation, technology strategies accordingly. uptake, and defense policy, for the United State's global
OCR for page 1