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13 CHAPTER THREE CHIP SEAL DESIGN INTRODUCTION alterations to the binder application rate as the underlying sur- face changes, making the specification of a single material Before there is any consideration of design methodology, it application rate impossible. As a result, careful characterizing must be understood that the selection of those roads that will of the existing surface throughout the length of the chip seal benefit from the pavement preservation technology inherent project is vital to producing a successful end product. with chip sealing is the first and most fundamental step in the design process. Chip seals are not meant to enhance the structural capacity of the pavement section and therefore CHIP SEAL PROGRAMMING should not be applied to roads that exhibit severe distress At the heart of a successful chip seal program is commitment (Moulthrop 2003). The formula for chip seal success is elo- to selecting the most appropriate PM treatment for the situa- quently framed by the following quotation: "Succinctly tion. PM programming that identifies the optimum timing of stated, the correct approach to preventive maintenance is to a chip seal cycle will maximize the economic benefits (Weg- place the right treatment on the right road at the right time" man 1991). Figure 7 is a flow chart showing the chip seal pro- (Galehouse et al. 2003). gram cycle. There are basically only two types of materials used in Chip seals will enhance pavement condition and extend chip seals: binder and aggregate. Aggregate selection is a pavement service life when applied on pavements showing function of geography, where availability and transporta- minimal distress (Moulthrop 2003). Again, chip seals are not tion distance essentially define the aggregate cost function. expected to improve structural capacity to the pavement. Aggregate selection is not only a function of seeking opti- However, it appears to be common practice to apply chip mum gradation; it is also a function of selecting the most seals to pavements that have structural distresses as a stop- appropriate chip seal for the project (Moulthrop 2003). The gap measure. Survey respondents indicated that determining Long-Term Pavement Program included the Specific Pave- when to use a chip seal could result from a combination of ment Study 3 (SPS-3), which looked specifically at the tim- factors, ranging from formula-driven algorithms to birthday ing of pavement maintenance actions. It found that roads that sealing or visual evaluation of the pavement surface. Some were in poor condition (i.e., exhibited high levels of distress) agencies rely on their internal pavement management system when a chip seal was applied had a probability of failure that data as the trigger for deciding when to place a chip seal. was two to four times greater than those that were in good condition. It also found that "chip seals appear to outperform By identifying the triggers that initiate selection of a chip the other treatments . . . in delaying the reappearance of dis- seal, the survey responses identified a difference of philoso- tress" (Eltahan et al. 1999). phies in chip seal use between the North American and the international respondents, as shown in Figure 8. In North The binder selection process is a function of the pave- America, the most common conditions that would trigger a ment's surface, size and gradation of aggregate, compatibil- chip seal are evidence of distress and prevention of water ity with local aggregate, and local climatic considerations infiltration. The international respondents identified the loss (Gransberg et al. 1998). One of the major difficulties in the of skid resistance and the need to provide a wearing surface design of material application rates is the nonuniformity of as major reasons for chip sealing. the existing pavement surface. The engineer must remember that variation in the existing pavement occurs both in the transverse and longitudinal directions. The transverse varia- CHIP SEAL DESIGN METHODS tion is usually defined as the difference in the surface texture on the wheelpaths and outside and between the wheelpaths, Chip seal design methods largely fall into two fundamental including rutting. Longitudinal variation occurs as the surface categories: empirical design based on past experience and condition varies along the road from areas where the under- design based on some form of engineering algorithm. A large lying surface is oxidized to other areas where the surface may body of research is available on formal chip seal design be smooth or bleeding. Particular attention should be given practices. A contemporary chip seal design process involves when determining binder application rates on pavements dis- the determination of grade, type, and application rate for a playing varying surface textures. Such conditions necessitate bituminous binder when given the aggregate size and type,

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14 38 Identify Potential Chip Seal Projects 40 35 30 25 Planning and Selection of Chip Seal Projects Yes 20 10 No 15 8 5 6 10 Pre-construction Activity 0 5 Patching 0 Crack Sealing US Canada AU, NZ, UK, SA FIGURE 9 Proportion of agencies formally designing chip seal application rates. Design and Preparation of Plans methodologies in practice today. The literature review and Call for Bids and Award of Contract survey results revealed the use of two generally accepted chip seal design methods in use in North America: the Kearby method and the McLeod method. Although a few North Equipment Inspection Feedback American agencies have also developed their own formal Calibration design procedures that are not based on either method, most Production use either an empirical design method or no formal method at all. Overseas, there are four additional chip seal design meth- ods in use. The United Kingdom's Transport Research Labo- Chip Seal Operation ratory (1996) has published several editions of a comprehen- sive design procedure for chip seals (called "surface dressing" in the United Kingdom). Commonly known as Road Note 39, Performance Monitoring this design method is based on a computer software program. A variation of Road Note 39, Road Note 3, has been developed for surface dressing design in tropical regions. Australia, New Post-Contract Evaluation Zealand, and South Africa have also developed engineering- based chip seal design methods for use in their respective countries. Australia's is called Austroads Provisional Sprayed FIGURE 7 Chip seal program cycle [after Senadheera and Seal Design Method (2001). New Zealand uses this method Khan (2001)]. with its own regional variation, and South Africa's method is called TRH3 (i.e., Technical Recommendations for Highways, Surfacing Seals for Rural and Urban Roads). The primary surface condition of existing pavement, traffic volume, and formal design methodologies in practice today in North actual type of chip seal being used. Figure 9 illustrates the America and overseas are reviewed and analyzed in Appen- proportion of agencies that formally design their chip seal dix C. Table 1 shows the percentage of North American application rates before construction. respondents using the various design methods. The earliest recorded effort at developing a design proce- dure for chip seals was made by Hanson (1934/35). Traces of Past Experience in Empirical Methods Hanson's design can be found in all major chip seal design The very early practitioners of surface treatments or seal coats appear to have used a purely empirical approach to Wearing 2 Surface 9 Skid 2 TABLE 1 Resistance 2 CHIP SEAL DESIGN METHODS AU, NZ, UK, SA IN NORTH AMERICA Oxidation 5 North America United States Canada Water 1 Chip Seal Design Method (%) (%) Infiltration 9 Distress Kearby/Modified Kearby 7 0 10 McLeod/Asphalt Institute 11 45 Empirical/past experience 37 33 0 2 4 6 8 10 12 Own formal method 19 0 FIGURE 8 Reasons for chip sealing. No formal method 26 22