Beam Technologies for Integrated Processing (1992) / Chapter Skim
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4 BEAM APPLICATIONS IN MICROELECTRONICS
4 BEAM APPLICATIONS IN MICROELECTRONICS
Pages 33-42
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From page 33... ...
The continuous need to produce smaller and more complex structures with higher quality and yield has provided the major emphasis for much of the development of sophisticated beam processes and beam processing equipment. Some of the applications of beam technologies in the fields of integrated circuit and optoelectronics fabrication are reviewed here to illustrate the capabilities and advantages of these technologies over previous manufacturing techniques.
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From page 34... ...
_ __ _ _ tt.~68888844586888888888888880~888868te88888~86~8 181858188688668868885888888888668888888088488~18848 _ _ ~ ~ ~ ~ ~ ~ ~ '1 #~-~ - ~ Us _ __ - _ __ 1166118188 ~88881~88 ·~686804 8868888-e it__ '^~. Figure 4-1 Typical IC processing sequence.
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From page 35... ...
1 Am Masked Photoresist exposure, feature size of ~0.2S am Direct write resist exposure, feature sizeof50.1~m Uses Plasma etching C,F, SiO: Diffusion and implant windows, vies CFJSF, Si,N, Diffusion and oxidation windows CFJSF, Silicon Trench isolation, polysilicon interconnect CIJBC1, Aluminum Metal interconnect CF./SF, Tungsten Metal interconnect Plasmaetchiog, C2F. SiO2 Spacers, planarization unpatterned CE, Si,N, Nf;~kin8 layer removal CF, Polysilicon Storage capacitors, three-dimensional structures CF./SF, Tungsten Via plugs Sputter etching Ar Any Cleaning, surface layer removal Cow Technglosies Sputtering Ar Any Surface cleaning prior to deposition O2 O2 Photoresist Photoresist removal and surface creasing H2 plasma H2 SiO2 Surface cleaning prior to epitaxy
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From page 36... ...
The resulting implant doping profiles are not as dependent on temperature and solid solubility as are diffusion doping profiles. Implantation also allows a major reduction of the thermal budget for temperaturesensitive process steps and permits buried-layer profiles, which cannot be readily accomplished with thermal diffusion.
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From page 37... ...
All present methods for dry etching depend on the use of a plasma to generate chemically active radicals in the low-pressure gas ambient. This provides the unique capability to etch highly anisotropically, which allows preparation of much smaller feature dimensions and gives the ability to create threedimensional structures.
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From page 38... ...
SiO2 removal by hydrofluoric acid solution; (g) capacitor film growth, polysilicon deposition, cell plate, and bit line formation.
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From page 39... ...
... _ Deposition ~ ~ Technologies l | M serial | Uses l MOCVD l | G As | Buffer layers, FET channels MBE AlGaAs Super lattice buffers, ~ ~ heeerojunction transistors l I | In(raAs | Heterojunction transistors, contacts In AIAs Heteroj unction transistors , contacts l Etching Technologies | Etching Gas | Ma teria1 | Uses Plasma etching | Cl: | Ga As | Selective material removal, backside vies on milling | Ar | Go d | Interconnect etching Heating | Ambient | | Uses Rapid optical anneal | Ar, AsH3, N: | | Implant activation, contact formation .
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From page 40... ...
. Figure 4-6 Illustration of complex transistor structures.
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From page 41... ...
The same technique is often applied to form ohmic contacts to GaAs and to Si ICs when the thermal budget is tight. OPTOELECTRONICS Processing techniques to fabricate optoelectronic components are similar to those used to fabricate heterojunction compound semiconductor devices.
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From page 42... ...
198&. A blululevel Tungsten Interconnect Technology.
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